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Appendix A: Hardware Reference Manual
VPWR pin should be bypassed to ground with a.1.0 μ F. capacitor. These recommendations are
implemented and are demonstrated in the schematic.
As a system reference, the control capability of the MC33812 maintains a 2% tolerance over voltage and
temperature. From an analog signal measurement perspective, this reference tolerance carries through
to the actual measurement result along with other system specific measurement uncertainty. For
successive approximation result (SAR) type of analog to digital converters (ADCs) found on most MCUs,
this reference voltage dominates the error associated with a measurement. The 2% tolerance from the
5.0 V pre-regulator of the MC33812 provides good performance for analog signal measurement.
Ultimately, the end performance requirements for the system must use the analysis of all measurement
error components. If the performance requirements for system require additional precision from analog
voltage reference, a separate voltage reference is recommended. However, the use of the S12 and S12X
MCUs allow extremely high precision measurements to be made without a high precision voltage
reference. This is accomplished by using the internal bandgap reference of the MCU. By measuring the
internal bandgap, compensation for lower precision analog voltage references can be performed with little
overhead. The end result is a significant improvement in measurement performance with no system cost
impact.
10.4.2.3
10.4.2.3.1
Injector Driver
Design Criteria
The injector driver is a low side driver with a typical 200 mOhm, RDSON. It is capable of driving most fuel
injectors that draw less than 3.0 Amps and must be protected against inductive transients. Additionally,
faults associated with conditions that render the injector inoperable, must be detected to prevent system
damage and provide diagnostics for repair.
10.4.2.3.2
Implementation Recommendations
Direct control of an injector is performed on the INJOUT pin of the MC33812. The input pin, INJIN, is a
logic level (5.0 Volts) CMOS input which can be driven by any GPIO pin from the MCU. However, the
control of the pin is typically done through a timer channel configured for output compare. Alternatively, it
can be connected to an eTPU channel on an MCU containing this peripheral.
The minimum specified current limit for this driver is 3.0 A. A built-in clamp circuit limits the injector's
inductive flyback voltage on the pin to 53 V, typically. The injector driver is an inverting logic element so
that when the INJIN pin is high, the INJOUT is low, turning on the injector and vice versa. The injector
driver monitors the injector for fault conditions such as shorted coil (short to battery), and open coil or
other open circuit connection (wiring or connector). The injector driver circuit protects itself against over
voltage, over current, and over temperature. If any of these conditions are present, it indicates the “fault”
to the MCU by bringing the normally low INJFLT line, high. The INJFLT line will stay high until the INJIN
line goes low and then high again, if the fault has cleared. Detection of the fault is done through GPIO of
the MCU. Proper detection of a fault should use interrupts that are triggered when the fault pin goes high.
This is implemented on the ECU by connecting all fault pins to Port A pins which have a dedicated
interrupt. A simple interrupt service routine can be used to determine which fault pin triggered the interrupt
and then determine the type of fault by reading the state of the control pin associated with the load that
created the fault. If the control pin is active or in the high state, a short to battery condition can be reported
to the main application. If the control pin is in active or in a low state, an open load condition can be
reported. Additional detection of over temperature and over voltage can be performed with additional
detection code.
Since the INJOUT pin goes to wiring off the circuit board, it must be protected against ESD transients by
means of a capacitor. In the reference design, a 10 nF capacitor with a 100 V rating is used on all outputs
that go to the P1 and P2 connectors. This is a generic implementation for the defense of ESD type of
Freescale Semiconductor
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